The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased.
For advanced process technology, such as lithography, a multi-function system is often used. For example, an in-line tool referred to as a Track & Scanner is a one-on-one system, in which all products for multiple related processing steps are constrained in the same in-line tool. Continuing with this example, a typical lithography process includes the steps of receiving a substrate (wafer), depositing a resist film on the wafer, exposing the resist film, and developing the exposed resist film to form a patterned image. If, for example, a resist filter and tubing of the system require unexpected maintenance, the overall process may be delayed several hours and even several days, which not only affects all of the wafers in the system, but other wafers scheduled to use the system. In this example, the resist deposition component of the system may be unusable, but other components, such as the exposing component, may be fully functional. The idle time of the exposing tool decreases overall product throughput. Accordingly, what is needed is a method for improving the utilization of the multi-function system.